Top Tech Jobs & Startup Jobs in Boston, MA

Lead the qualification and process development for a new InP photonics semiconductor fabrication facility, focusing on process integration and yield improvement.

Responsible for managing wafer level testing processes to improve yield, overseeing test equipment, and coordinating with external suppliers and engineering teams.

The role involves leading equipment development for automated assembly in semiconductor manufacturing, managing vendor relationships, and improving equipment efficiency. It requires extensive experience in packaging and assembly technology for microelectronics, particularly in the photonics sector.

Provide EDA/CAD support for SiGe and CMOS high-speed analog/mixed-signal ASIC design. Install, customize, and support vendor PDKs and CAD tools, develop design standards and flows, execute layout, archive and tapeout, and support engineering users and license/tool infrastructure.

Design and implement Wi‑Fi 6 (802.11ax) and 802.11s mesh networking software for enterprise access points. Develop HMAC components, optimize throughput/latency/airtime, integrate on NXP-based Embedded Linux platforms, maintain hostapd/wpa_supplicant/mac80211, debug with packet captures, and collaborate with RF/firmware/QA teams for product releases.

Design and lead development of hardware architectures for satellite communications and ground stations. Drive integration, verification, environmental and EMC testing, root-cause analysis, and hardware qualification. Collaborate with multidisciplinary teams, mentor junior engineers, produce technical documentation, and contribute to technology roadmaps while ensuring aerospace industry compliance.

The Optical Test Development Engineer designs and develops optical test systems, collaborates across teams, analyzes test data, creates automation scripts, and maintains quality standards.

Lead verification testing for high-speed coherent and direct-detect photonic components and subsystems. Design test plans/algorithms, execute module performance validation, and collaborate with PIC, ASIC, module, and system teams to ensure quality product releases.

Develop, optimize, and integrate 5G NR L2/L3 protocol stacks (MAC, RLC, PDCP, RRC, NGAP). Implement scheduling, HARQ, buffer management, and mobility features. Debug protocols using tracing tools and integrate L2/L3 with PHY and 5GC to improve throughput, latency, and handover performance.

The Head of RE Labs & Fabs Infrastructure will develop strategic infrastructure plans, oversee governance, manage projects, ensure operational excellence, and foster cross-functional collaboration to enhance lab, manufacturing, and data center environments.