Top Tech Jobs & Startup Jobs in Boston, MA

Design, deploy, operate, and automate reliable large-scale EDA infrastructure services on NVIDIA hardware. Build tools that reduce manual work, support distributed private and public cloud systems, define service-level objectives, improve observability, and participate in incident response and on-call rotations. The role also provides systems-design guidance to peer teams and may involve Kubernetes, OpenStack, Docker, Slurm, multi-cloud infrastructure, networking, storage, and GPU-based systems.

Build and operate AI infrastructure systems, including telemetry pipelines, observability dashboards, incident-management automation, hardware and software catalogs, service ownership data models, and self-service discovery tools. Lead cross-functional infrastructure initiatives and develop AI-assisted operational tooling. The role requires production software and infrastructure expertise, programming experience, and the ability to improve reliability, visibility, incident response, and operational efficiency across NVIDIA GPU cloud environments.

Design and operate large-scale infrastructure supporting GPU- and CPU-based EDA workloads. Build automation for provisioning, configuration, deployment, lifecycle management, monitoring, health remediation, cluster enrollment, and recovery across Linux compute fleets. Integrate services with schedulers, infrastructure systems, and observability platforms. Participate in incident response, root-cause analysis, capacity planning, and reliability improvements while collaborating with EDA, networking, storage, and hardware teams.

The role involves defining verification strategies, building infrastructure for SoC verification, and collaborating with various teams to meet project requirements.

As an EDA Workflow Optimization Engineer, you will optimize and enhance workflows for chip development, working with teams to investigate, debug, and innovate tools for efficient engineering processes.

Design, build, and modernize full‑stack web applications and microservices for a real‑time event-driven data and visualization platform. Develop and optimize streaming data pipelines (Kafka, Flink, Spark), integrate observability, caching (Redis), and AI agents, and collaborate with hardware verification teams for scalable, low-latency solutions.

Design and implement NVLink protocol and GPU subsystem logic: micro-architecture, RTL implementation and debug, timing- and power-optimized logic design, collaborate with verification and physical design teams, support floorplan, power/clock distribution, timing closure, and back-end verification; develop supporting flows and tools.

Design and implement reliable, scalable full‑stack web tools (backend and frontend) to automate and optimize chip design and verification workflows. Build web applications in Go, TypeScript, and JavaScript, model hardware-level product definitions, research solutions to improve engineering efficiency, and support hundreds of global users.

Verify ASIC/GPU and SoC designs using advanced verification methodologies. Define verification scope, develop test plans and test generators, build verification infrastructure, and collaborate with architects, designers, and pre/post-silicon teams to validate CPU/GPU interactions and memory coherence.

Develop system software components, collaborate on SOC designs, support DPU projects, optimize system-level resource utilization, and engage in all product development lifecycle stages.