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The engineer will develop system features for power and performance optimization, collaborating with cross-functional teams and leading validation efforts.

Responsible for verifying high-speed coherent interconnect designs, developing verification infrastructure, collaborating with teams to ensure design correctness, and mentoring junior engineers.

The Senior ASIC Verification Engineer will verify high-speed coherent interconnect designs, develop verification infrastructure, and collaborate with cross-functional teams to ensure design correctness.

The role involves developing methodologies for SOC design, improving chip implementation processes, and ensuring high-quality front-end designs.

Design, deploy, and manage large-scale GPU clusters for AI workloads, ensuring operational excellence and high availability in a multi-cloud environment.

Design and implement high-performance, low-power CPUs, collaborating with cross-functional teams for verification and physical design while optimizing architecture and documentation.

Responsible for implementing logic for GPUs and SOCs, micro-architectural design, RTL coding, verifying performance, and collaborating with teams.