Top Tech Jobs & Startup Jobs in Boston, MA

Leads global end-to-end supply planning for memory commodities, including inventory optimization, shortage mitigation, excess and obsolescence management, supplier strategy, and new product introduction transitions. Partners with suppliers, finance, engineering, business units, and operations teams to align supply plans, manage technology lifecycles, mitigate risks, and support revenue targets.

Drives revenue growth by selling Splunk enterprise software to large enterprise accounts. Responsibilities include developing pipeline strategies, achieving license, support, and services revenue targets, expanding customer relationships, managing complex deals, leveraging channel partners, coordinating internal resources, and communicating progress and business insights. The role requires fluent English and French, strong enterprise sales experience, business planning, executive influence, and a track record of new business development and quota achievement.

Lead product integration and commercialization of Acacia client optics within Cisco. Define requirements, drive product lifecycle (specs, quality, go-to-market, decision reviews), collaborate with engineering, operations and systems applications, support supply chain/manufacturability/capacity ramps, and produce customer documentation and roadmap/strategy influence to ensure market timing and profitability.

Lead hardware lifecycle for high-speed coherent optical interconnect products. Architect, specify, design, verify, and validate PCB and electro-optical hardware, resolve complex transmission and power integrity issues, coordinate cross-functional stakeholders, mentor engineers, and support lab debug and validation of 400G–1.2T pluggable modules.

Lead hardware engineering for high-speed coherent optical modules: define architecture, specifications, design, and validate hardware. Resolve complex transmission-line, power delivery, and analog/RF issues during NPI, collaborate with optics, DSP, and software teams, and perform hands-on lab debugging and testing.

Lead ASIC implementation with a focus on Design-for-Test (DFT): define DFT architecture, coordinate with RTL and physical design teams, drive ATPG and EDA tool use, own test infrastructure and post-silicon validation, collaborate on timing closure and electrical planning, and develop reusable DFT IP and verification flows.

Lead architecture and development of embedded firmware for high-speed coherent optical transceivers. Design system software, develop algorithms and low-level drivers, perform RTOS debug, system bring-up, and cross-functional coordination with ASIC, DSP, hardware, product, and quality teams. Interface with customers on SW architecture and support product transition to manufacturing.

Lead architecture and development of embedded firmware for coherent optical transceivers. Design algorithms and low-level C/C++ code for RTOS and bare-metal CPUs, drive cross-functional requirements with hardware, ASIC, DSP, and optics teams, participate in system bring-up, debugging, manufacturing transition, and customer technical discussions.

Research, design, and implement foundation models for machine-generated and graph data; develop distributed training and inference pipelines; collaborate with engineering and product teams to productionize models; evaluate new AI/ML techniques and drive MLOps, monitoring, and model optimization to improve scalability and reliability.

Lead yield and product lifecycle activities for optical semiconductor transceivers: collaborate with foundries, DFT and test teams; analyze ATE/WAT data; optimize test flows and process corners; own yield roadmaps and cost analysis; engage suppliers and contract manufacturers; establish manufacturing metrics; drive NPI-to-production yield characterization and continuous improvement.