Top Tech Jobs & Startup Jobs in Boston, MA

Define and specify system-level digital architectures for high-speed mixed-signal photonic communication chips. Collaborate with digital, analog, photonic, firmware, and test teams to enable SerDes, ADC/DAC, modulators, and receivers from concept through production. Produce and validate architectural specifications and work with RTL and verification teams to ensure implementation and test alignment.

Design and architect high-speed (50G+) analog/mixed-signal circuit blocks for optical transceivers, collaborate with analog, digital, photonics, and software teams to model and analyze solutions, produce and validate architectural specifications, and represent technical leadership externally.

Design, model, and validate electro-optic links for a 3D-stacked photonics engine. Perform end-to-end simulations with photonics/analog tools, co-design analog and photonic devices, plan RF/high-speed experiments, analyze prototype data, and author architectural specifications across cross-disciplinary teams.

Lead program execution for hardware systems across electrical, mechanical, and system engineering. Build and maintain integrated schedules (NPI/EVT/DVT/PVT), manage material flow and BOMs, coordinate suppliers and contract manufacturers, resolve resource conflicts, track budgets, and communicate status and risks to engineering leadership and cross-functional stakeholders. Establish lightweight PM processes and drive programs from design through production.

Design and layout block- and chip-scale silicon photonic circuits from concept through tapeout and bring-up. Collaborate with analog, digital, packaging, product, and architecture teams to floorplan and integrate on-chip photonics, perform layout-driven simulation and verification, troubleshoot performance bottlenecks, improve layout/verification flows and PDKs, and support photonic product development and publications.

Lead hands-on verification and characterization of high-speed electro-optic links: run lab measurements, build channel models, verify link budgets, characterize BER/eye/jitter/equalization, support silicon bring-up and cross-team debug, influence architecture, mentor engineers, and build automation tools.

Lead STA sign-off and timing closure for silicon-photonics ASICs across process nodes. Develop timing constraints, run full-chip STA, automate ECOs with Tempus/PrimeTime, collaborate with RTL/DFT/architecture teams, and document best practices for synthesis through PnR and tapeout signoff.

Develop and maintain photonics PDK components and pcells, ensure synchronization between layouts, netlists, and models, author LVS/DRC decks, perform device extraction and LVS troubleshooting, build automated regression and CI pipelines, and collaborate across design, layout, and modeling teams to support tape-outs.