Top Senior Hardware Engineer Jobs in Boston, MA

Designs and prototypes RF hardware and analog/mixed-signal systems for hardware-in-the-loop, digital twin, and surrogate platforms. Characterizes and debugs complex electronic systems using laboratory test equipment, develops automated acquisition and control platforms, leads customer and internal test events, and represents hardware expertise on interdisciplinary teams. The role also supports technical proposals, design reviews, documentation, cost estimates, scheduling, and mentorship of junior engineers.

Tests, validates, and troubleshoots next-generation cloud server hardware for performance, power, reliability, and quality. Develops test scripts, documents results, identifies defects, recommends improvements, and resolves hardware issues across engineering and manufacturing environments. Requires hands-on embedded systems debugging, Linux and scripting experience, and knowledge of server architecture, firmware, operating systems, networking, storage, and hardware acceleration technologies.

The Senior Cyber RF Hardware Engineer will design RF and mixed-signal hardware, develop prototypes, and lead hardware integration efforts while working with a multi-disciplinary team.

Design and prototype sensor hardware, including PCBs, mechanical housings, and electromechanical systems for industrial environments. Develop test strategies, collect and analyze sensor data, integrate sensors with Zephyr RTOS platforms, and support field trials. Lead rapid R&D evaluations, product bringup, debugging, fabrication, and cross-functional system development.

Develop and own compute and GPU server platforms from architecture through global deployment. Responsibilities include schematic and layout reviews, design for manufacturability, new product introduction, board and system bring-up, validation, debugging, firmware and BIOS feature management, technology qualification, and vendor coordination. The role requires hands-on server architecture, board-level design, Linux and scripting expertise, platform validation, and five-day-per-week presence in the Cambridge office.

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

Validate server hardware components and new platform designs through power, thermal, performance, firmware, and automation testing. Maintain hardware test infrastructure, document technical findings, coordinate with ODM/OEM partners, and collaborate with software teams on BIOS, kernel, and firmware optimization. The role requires expertise in server architectures, validation methodologies, Linux, Python, Bash, Redfish, IPMI, and industry standards including PCIe, NVMe, and DDR.

Provide strategic technical leadership for board-level hardware design across defense and aerospace programs. Architect high-speed digital boards (400G+ Ethernet, PCIe Gen5+, DDR5+), drive design-for-manufacturing/test, lead proposals and BOE, mentor engineers, and champion signal integrity, EMI, and reliability practices for ruggedized mission-critical systems.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Design and implement NVLink protocol and GPU subsystem logic: micro-architecture, RTL implementation and debug, timing- and power-optimized logic design, collaborate with verification and physical design teams, support floorplan, power/clock distribution, timing closure, and back-end verification; develop supporting flows and tools.

Lead architecture and development of rugged board‑level hardware for high‑speed embedded systems. Design and verify advanced digital circuits (400G+, PCIe Gen5+, DDR5+), mentor engineers, establish hardware standards, support proposals, and drive DFM/DFA/DFT with cross‑functional teams to deliver high‑reliability defense/aerospace solutions.

The Senior Hardware Integration and Test Engineer will lead hardware integration and testing tasks, develop test plans, manage project risks, and mentor junior engineers within a multidisciplinary team.

Design and develop hardware from concept through production for microcontroller-based systems. Create analog and mixed-signal circuits, power supplies, and manage signal integrity. Use EDA tools for schematic/PCB design, validate prototypes with lab equipment, ensure EMI/EMC compliance (automotive), and collaborate with firmware, mechanical, and test teams to ensure manufacturability and robustness.

Lead the design and implementation of hardware systems, provide mentorship, validate and test designs, and ensure compliance with standards.

Provides technical leadership and customer support for Marvell switching, PHY, and processor SoC products. Architects hardware solutions, investigates and reproduces hardware and software issues, performs schematic reviews, debugs boot sequencing and customer-reported problems, and supports Linux BSPs, U-Boot, device drivers, and board designs. Serves as a liaison among customers, Avnet field applications engineers, and Marvell engineering teams, while delivering training and occasional customer-site support.