Top Remote Senior Level Hardware Engineer Jobs in Boston, MA

Develop and own compute and GPU server platforms from architecture through global deployment. Responsibilities include schematic and layout reviews, design for manufacturability, new product introduction, board and system bring-up, validation, debugging, firmware and BIOS feature management, technology qualification, and vendor coordination. The role requires hands-on server architecture, board-level design, Linux and scripting expertise, platform validation, and five-day-per-week presence in the Cambridge office.

Design and deliver complex FPGA and CPLD systems using RTL, integrated IP, simulations, timing closure, and lab debugging. Collaborate with clients and cross-functional engineering teams on architectures spanning video, communications, storage, signal processing, and other advanced applications. Support design reviews, prototype demonstrations, documentation, technical estimates, proposals, and customer implementation. The role requires strong FPGA tool-flow expertise, communication skills, and customer presence.

The SOC Architect will lead the development of high-performance SoCs, defining security features, and collaborating with product teams and customers to deliver system IPs.

Designs complex RF printed circuit board layouts and schematics using Altium Designer. Creates component libraries, footprints, and 3D models; evaluates design feasibility, manufacturability, testing, cost, packaging, impedance control, and signal integrity. Coordinates with engineering, manufacturing, quality, test teams, and fabrication vendors throughout design release and production. Applies IPC standards, resolves fabrication issues, establishes design standards, and contributes to PCB design trade-offs and specifications.

Design and implement FPGA code for satellite digital payloads, including DSP algorithms, software-defined radio signal processing, embedded systems, and processor or peripheral interfaces. Responsibilities include developing custom IP, improving DSP and interface reliability, integrating vendor IP cores, supporting communications architecture, and participating in spacecraft design studies. The engineer will work across simulation, synthesis, place and route, timing closure, and hardware testing.

Develop and execute verification strategies for complex hardware IP, subsystems, and full-chip designs supporting Azure cloud servers. Responsibilities include writing test cases, simulators, and device specifications; evaluating verification tools; reviewing silicon architecture; managing schedules and risks; coordinating with internal and external teams; and contributing to training and technical leadership.

Design and optimize passive and active silicon photonic components from simulation through layout, foundry tapeout, and characterization. Perform electromagnetic and multiphysics simulations, analyze wafer-level measurement data, develop manufacturable designs, and collaborate with layout engineers, system-level PIC designers, and foundry partners. The role focuses on improving optical performance, fabrication tolerance, bandwidth, crosstalk, insertion loss, and power consumption for LiDAR and optical switching applications.

Develop and lead RF, SerDes, and mm-wave integrated circuits from architecture and simulation through silicon validation. Responsibilities include RF and analog IP design, layout guidance, characterization strategy, PCB development, RF and system-level measurements, competitive benchmarking, technology collaboration, productization, and university research liaison activities.

Supports and maintains mainframe hardware, including microcode, processor, storage, DASD, and tape configurations. Handles migrations, replication, disaster recovery, incident resolution, vendor escalations, and 24/7 on-call service restoration. Develops automation, tools, documentation, and standardized processes while supporting multiple clients in a leveraged environment. Performs ITIL change management, provides technical consulting, analyzes subsystem performance, and mentors team members.

Lead calibration architecture, optical integration, sustaining, troubleshooting, and manufacturing enablement for high-speed coherent optical linecards. Analyze calibration and test data, resolve production and field issues, develop lab-to-factory bring-up workflows, and collaborate with DSP, hardware, firmware, test, and manufacturing teams. Mentor optical engineers, communicate technical risks and trade-offs, and apply coherent optics expertise to current and next-generation platforms.