Seeking a Senior Analog Mixed-Signal Design Engineer to work on complex systems, involving low-level SPICE simulations and algorithm development in Python and SystemVerilog. Responsibilities include modeling circuits, tracking specifications, and collaborating across teams.
About Us:
Mythic’s platform delivers the power of desktop GPU in a single low-power chip, supporting inference for large deep neural networks. Mythic's technology is based upon an entirely new hybrid digital/analog flash calculation using non-volatile memory arrays which has been under development since 2012. This step change in performance enables a range of new applications in many markets, including safety and security, autonomous vehicles, VR/AR, robotics, and media. Mythic’s AI hardware combines knowledge across many domains, including AI, compilers, computer architecture, analog circuits, and non-volatile memories. Mythic will enable the future of AI by building analog-compute hardware platforms that are 100-1000x more efficient than conventional all-digital systems
About the role:
We are looking for a highly experienced analog and mixed-signal designer who excels working in large complex systems with and enjoys utilizing a broad set of skills. This person will do everything from low-level SPICE simulations to top-level algorithm development in python and SystemVerilog/RNM, all while ensuring interfaces, specifications, and features are clear between multiple teams.
Requirements for the position include:
- Years of experience using the Cadence Virtuoso IC design environment for both analog and mixed-signal design and verification
- Experience modeling circuits in order of preference:
- Real Number Modeling (systemVerilog)
- Python/Numpy
- MATLAB
- Experience tracking and communicating mixed-signal interface requirements/specifications
- Ability to work cross-functional teams with humility
- Excellent communication skills, especially resolving ambiguity
Additional attributes that set you apart:
- ADC/DAC design experience
- multiple architectures a plus
- Some PLL, SERDES, and sensing candidate backgrounds are highly relevant
- Chip-level experience:
- EM/IR
- ESD
- Power distribution modeling
- Experience developing calibration and test algorithms
- Mixed-signal interface experience
- Have designed your own digital controller or at least worked directly with digital engineers and owned the co-verification
- Automotive or other High-Reliability engineering experience
- Cadence tool setup and infrastructure knowledge (reasonable ability to debug)
- Strength in linux (reasonable ability to debug)
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