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HPR

FPGA Design & Verification Engineer I

Reposted 3 Days Ago
In-Office
Needham, MA
Entry level
In-Office
Needham, MA
Entry level
As an FPGA Design and Verification Engineer I, you'll design components, write verification plans, and collaborate on FPGA projects while growing your skills.
The summary above was generated by AI

HPR is a leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we’re searching for a forward-thinking FPGA Design & Verification Engineer I to help us build the future of capital markets infrastructure. 

As an FPGA Design & Verification Engineer I, you will:

  • Design and implement components for high-performance FPGA compute and networking systems used in electronic trading
  • Write verification plans and implement testbenches to ensure design correctness
  • Own design and verification projects through the entire FPGA development life cycle
  • Collaborate with cross-functional teams to solve technical problems at the intersection of hardware and software
  • Learn and grow your technical capabilities with mentorship from senior engineers

Required Qualifications:

  • Completed or pursuing a BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related
  • Demonstrated digital design and verification experience through relevant internships, academic projects, and/or professional work
  • Experience writing RTL in SystemVerilog or VHDL
  • Familiarity working in a Linux environment
  • Proficiency with a scripting and/or high-level software language (e.g. Python, Perl, or similar)
  • Excellent interpersonal, verbal, and written communication skills

Desired Qualifications:

  • Understanding of advanced digital logic design and computer architecture concepts
  • Experience working with FPGAs and familiarity with FPGA tools (Vivado and/or Quartus)
  • Familiarity with networking protocols (IP, TCP, UDP)

This position requires being on-site at our office in Needham, MA full-time (5 days per week) 

HPR does not currently provide employment sponsorship 



Top Skills

Linux
Perl
Python
Quartus
Systemverilog
Vhdl
Vivado
HQ

HPR Needham, Massachusetts, USA Office

Our newly renovated office space is easily accessible from all major highways and nearby public transit stations.

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