DFT Verification Engineer

 In this hybrid role, you will be responsible for helping to define and implement the DV methodology on our integrated photonics SoCs, as it relates to producing test benches and vectors targeted for manufacturing test. You'll work to root out bugs across digital, analog, and photonic domains using a mixture of traditional and to-be-invented design verification techniques. You will also be involved in traditional DFT flow development, test planning, automatic test pattern generation (ATPG), and validation and silicon debug.  We’re looking for someone with strong design verification (DV) experience who is interested in learning and growing into Design for Testing (DFT).

• Help define and enhance the DV-DFT methodologies required for integrated digital/analog/photonics devices
• Create and execute test plans to insure high quality tape outs, that meet functional and performance goals
• Work with architects, DV engineers, designers, and test engineers to define validation flows
• Create reusable and scalable test bench components, checkers, and DV architecture
• Create functional and validate functional test vectors for use in High Volume Manufacturing (HVM)
• Enhance, update, and improve the DFT implementation methodology and flow

Qualifications 

• Bachelor's degree in Electrical or Computer Engineering or other related fields
• 2+ years of advanced Design Verification techniques and languages including UVM 
• Expertise in Python scripting
• Basic understanding of DFT concepts with a willingness to learn and grow in the area
• Experience working with diverse teams of Engineers and Scientists

Preferred Qualifications:

• Master’s or higher in Electrical Engineering, Computer Engineering, or other related fields
• Can work independently and manage projects from start to finish with minimal supervision
• A problem-solver who excels at communicating and collaborating with cross-functional teams