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Marvell Technology

Analog Mixed Signal IC Design Engineer. Senior Staff

Reposted 14 Days Ago
Be an Early Applicant
In-Office
Toronto, ON
Senior level
In-Office
Toronto, ON
Senior level
Lead design and development of high-speed analog mixed-signal ICs, focusing on SerDes solutions in advanced technology nodes. Collaborate with cross-functional teams and support IP characterization and validation.
The summary above was generated by AI

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Central Engineering AMS-IP team provides leading-edge SerDes and Chiplet IO PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products.

What You Can Expect

The candidate will be leading the high-speed and high performance SerDes development in advanced technology nodes, 5nm, 3nm and beyond.

Design IP that includes but not limited to 112G/56G PAM4; 32G PAM2; DDR; Die-to-Die High Speed Interconnect; System PLL IPs.

Participate the SerDes architecture development with the DSP, Analog and Digital design teams.

Provide the instructions to the layout engineers.

Working with the AE for the IP characterization and validation plan.

Supporting IP Lab characterization and debugging.

Product and customer supporting.

What We're Looking For

Master’s degree with 5+ years of related professional experience and/or PhD in Electrical Engineering with 3+ years of experience.

  • Experience in high speed analog mixed signal design in 7nm and below for TSMC process.
  • PAM4, 56G or 112G SerDes Design experience highly desired
  • Demonstrable knowledge of high performance SerDes development
  • Demonstrable team player and works well in a collaborative environment
  • Project leading and SOC support is preferred
  • Strives to make others better

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
 
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-TD1

Top Skills

112G
56G
High Speed Analog Mixed Signal Design
Pam4
Serdes
Tsmc Process

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