Teams at Sapsol Technologies Inc

Structured SAP training program offering project-based learning, mentorship from experienced SAP professionals, exposure to real-time project scenarios, and skill development in multiple SAP modules for freshers or professionals transitioning to SAP careers.

Lead architecture, implementation, verification, and debug of advanced DFT solutions for complex ASIC/SoC designs. Own scan insertion, ATPG, MBIST/LBIST, JTAG/boundary scan, silicon debug, post-silicon bring-up, and cross-functional resolution of critical silicon issues. Evaluate and adopt emerging DFT methodologies to improve quality and yield.

Lead ASIC DFT Engineer responsible for architecting, implementing, verifying, and debugging DFT solutions for complex ASIC/SoC designs. Own scan architecture, ATPG, MBIST/LBIST, JTAG/boundary-scan, post-silicon bring-up, failure analysis, and DFT timing/SDC. Collaborate across RTL, STA, physical design teams, mentor engineers, and develop automation scripts to improve DFT flows and debug productivity.