Define performance telemetry and profiling architecture for next-generation Arm platforms spanning CPUs, accelerators, memory, interconnects, I/O, networking, storage, and chiplets. Establish observability specifications, telemetry models, profiling hooks, and cross-layer data flows from silicon through software and developer tools. Collaborate with hardware, software, power, modeling, and tooling teams to support workload analysis, bottleneck detection, performance validation, power-performance optimization, silicon bring-up, and deployment debugging across AI, edge, automotive, robotics, and infrastructure systems.