Develop and maintain high-performance C++ models of Arm Interconnect IP for system-level simulation. Investigate and resolve modeling and integration issues, deliver incremental model updates, collaborate with architects and hardware engineers on evolving designs, integrate and debug software on Arm Virtual Platforms, and drive technical discussions to improve modeling workflows.

Develop and maintain high-performance C++ functional models of Arm interconnect IP for system-level simulation. Collaborate with architects, hardware and CE-SW engineers to deliver incremental models, integrate software on virtual platforms, debug system-level issues, and improve modeling workflows. Communicate technical decisions and adapt to evolving specifications.