Jobs at Tenstorrent Inc.

The role involves advancing ASIC design methodologies, improving design quality and productivity through automation, and collaborating across teams to ensure efficient and scalable design flows.

The engineer will focus on pre-silicon verification of DFD logic in AI SoCs, developing environments, analyzing coverage gaps, and automating testing flows.

As Director, Systems & Solutions, lead the deployment and optimization of AI compute systems, focusing on hardware technologies and customer engagement to enhance performance and usability.

As an AI Performance Simulation Architect, you will architect and develop scalable cycle-accurate models for AI workloads and guide hardware design optimization.

The Senior Tax Manager leads Tenstorrent's tax function, managing compliance, audits, tax filings, and strategic tax planning while enhancing financial processes.

The role involves leading formal verification strategy for CPUs and chiplets, mentoring engineers, and collaborating across teams to ensure quality standards.

The Staff Software Engineer will focus on infrastructure automation, integration, and operations, contributing to backend development and SRE practices, while collaborating across teams and improving operational capabilities.

Lead and grow a software engineering team focused on RISC-V software ecosystem, collaborating with teams to establish RISC-V as the standard.

The Performance Architect will work on high-performance systems with expertise in software and hardware, focusing on AI and HPC solutions.

As a Senior Chiplet Physical Design Engineer, you'll design and integrate chiplets into a System-in-Package, focusing on synthesis and place-and-route, while collaborating with global teams.

The role involves full-custom layout of mixed-signal ICs, focusing on performance and integration into SoCs using advanced FinFET processes.

As a DevRel Engineer, you will create web tools and demos for developers, integrating AI features and improving UX alongside marketing efforts.

Design and specify next-generation CPU networking for datacenter and automotive/robotics targets. Work at the intersection of NoC, performance modeling, and RTL to guide architecture, collaborate with hardware, software, and systems teams, and contribute to datacenter networking and early-stage automotive/robotics networking scoping and specifications.

The CPU Core Unit Lead will develop next-generation CPU RTL, define microarchitecture specifications, oversee design quality, mentor junior engineers, and use AI tools to enhance design processes.