Jobs at Lightmatter

Own end-to-end simulation, co-design, and laboratory verification of photonic-electronic links. Develop multi-physics optical and analog models, perform corner, Monte Carlo, and PVT analyses, create link budgets, and correlate simulations with silicon measurements. Partner with photonic and analog circuit teams on architecture, specifications, interface requirements, and corrective design actions. The role requires high-speed optical lab expertise, silicon photonics experience, and proficiency in photonic, mixed-signal, and Python-based simulation workflows.

Lead development of the internal photonics PDK and component library. Build Python-based pcells, create and validate compact models for active and passive devices, automate parameter extraction from electromagnetic solvers, and correlate models with lab measurements. Implement regression testing, CI pipelines, and robust netlist/connectivity logic to ensure layout, models, and simulations remain synchronized.

Design, validate, and deploy DFT solutions for digital, analog, and photonic ASICs. Develop scalable automated flows, collaborate with RTL and physical-design teams, implement ATPG/MBIST/boundary-scan strategies, support pre-silicon validation and post-silicon bring-up and debug, and optimize test coverage and integration for production products.

Implement and sign off complex digital blocks from synthesis through physical verification in advanced process nodes. Drive full-chip STA and timing closure, power analysis, floorplanning, IO and clock distribution, DRC/LVS cleanup, and functional/timing ECOs. Automate flows with TCL/Python/Shell, collaborate across teams, and work with EDA vendors to resolve tool issues.

The Photonics Technical Lead will create scalable laser solutions for silicon photonics AI communications, collaborating across teams to ensure design feasibility and meet performance specifications.

The Staff Electrical Test Engineer will develop and implement ATE test solutions for Silicon Photonics products, support manufacturing testing, collaborate with teams to debug failures, and enhance testing productivity with scripting.

Lead design verification for integrated digital, analog, and photonic devices using UVM, mixed-signal/AMS methods, RNM, and emulation. Define DV methodology, create reusable testbenches, run block and full-chip verification, integrate analog IP and behavioral models, close coverage and signoff, and collaborate with architects and designers for performance and post-silicon validation.

The Sr./Principal Mixed-Signal Digital Architect will design digital circuits for photonic-based communication, collaborate with teams, and lead product development.

Drive the micro-architecture of a photonic communication fabric. Propose photonic device designs, estimate performance/power/area, collaborate with analog and photonic engineers, and author and validate architectural specifications for Passage.

Develop and extend device software and firmware for photonic processors and interconnects. Define control plane, diagnostics, and monitoring; integrate with datacenter administration (CMIS, OpenBMC, DMTF). Implement security, telemetry, virtualization, and remote administration. Debug embedded systems, collaborate across hardware and software teams, and participate in customer engagements to gather requirements.

Define and specify system-level digital architectures for high-speed mixed-signal photonic communication chips. Collaborate with digital, analog, photonic, firmware, and test teams to enable SerDes, ADC/DAC, modulators, and receivers from concept through production. Produce and validate architectural specifications and work with RTL and verification teams to ensure implementation and test alignment.

Design and architect high-speed (50G+) analog/mixed-signal circuit blocks for optical transceivers, collaborate with analog, digital, photonics, and software teams to model and analyze solutions, produce and validate architectural specifications, and represent technical leadership externally.

Design, model, and validate electro-optic links for a 3D-stacked photonics engine. Perform end-to-end simulations with photonics/analog tools, co-design analog and photonic devices, plan RF/high-speed experiments, analyze prototype data, and author architectural specifications across cross-disciplinary teams.

Lead program execution for hardware systems across electrical, mechanical, and system engineering. Build and maintain integrated schedules (NPI/EVT/DVT/PVT), manage material flow and BOMs, coordinate suppliers and contract manufacturers, resolve resource conflicts, track budgets, and communicate status and risks to engineering leadership and cross-functional stakeholders. Establish lightweight PM processes and drive programs from design through production.

Design and layout block- and chip-scale silicon photonic circuits from concept through tapeout and bring-up. Collaborate with analog, digital, packaging, product, and architecture teams to floorplan and integrate on-chip photonics, perform layout-driven simulation and verification, troubleshoot performance bottlenecks, improve layout/verification flows and PDKs, and support photonic product development and publications.

Lead hands-on verification and characterization of high-speed electro-optic links: run lab measurements, build channel models, verify link budgets, characterize BER/eye/jitter/equalization, support silicon bring-up and cross-team debug, influence architecture, mentor engineers, and build automation tools.

Lead STA sign-off and timing closure for silicon-photonics ASICs across process nodes. Develop timing constraints, run full-chip STA, automate ECOs with Tempus/PrimeTime, collaborate with RTL/DFT/architecture teams, and document best practices for synthesis through PnR and tapeout signoff.

Develop and maintain photonics PDK components and pcells, ensure synchronization between layouts, netlists, and models, author LVS/DRC decks, perform device extraction and LVS troubleshooting, build automated regression and CI pipelines, and collaborate across design, layout, and modeling teams to support tape-outs.