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Intel Corp

Senior IP Design Verification Engineer

Posted Yesterday
Be an Early Applicant
In-Office
3 Locations
154K-217K Annually
Mid level
In-Office
3 Locations
154K-217K Annually
Mid level
The role involves functional verification of IP logic, developing verification plans, executing tests, debugging issues, and collaborating with various teams to enhance design verification.
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Job Details:

Job Description: 

Do Something Wonderful!

Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who We Are

We are seeking a highly skilled Verification Engineer to work on verification and validation of advanced memory coherency fabric systems for next-generation data center and AI chips. The ideal candidate will have a strong background in pre-silicon verification, an understanding of memory coherency protocols and interconnect architectures, and hands-on experience developing testbenches and validation strategies.

Who You Are

Your responsibilities will include but not be limited to:

  • Performs functional verification of IP logic to ensure design will meet specification requirements.

  • Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm microarchitecture specifications.

  • Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.

  • Replicates, root causes, and debugs issues in the presilicon environment.

  • Finds and implements corrective measures to resolve failing tests.

  • Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.

  • Documents test plans and drive technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology.

  • Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Qualifications:

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
 

Minimum Qualifications

  • The candidate must have a Bachelor’s Degree in Computer Engineering/Computer Science or Electrical Engineering with 4+ years of relevant experience -OR- a Master’s Degree in Computer Engineering Computer Science or Electrical Engineering with 3+ years of relevant experience

Preferred Qualifications

  • Proficiency in System C System Verilog UVM and ESL modeling methodologies

  • Proficiency in HW design and verification methodologies

  • Working knowledge of highspeed HW protocols eg. PCIe UPI DDR

  • Knowledge of Software development practices and quality standards Experience with Unix Windows based SW development tools

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, California, Santa Clara

Additional Locations:US, Massachusetts, Beaver Brook, US, Oregon, Hillsboro

Business group:The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US:

$153,540.00-$216,770.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Top Skills

Ddr
Esl Modeling
Pcie
System C
System Verilog
Unix
Upi
Uvm
Windows

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