Lightmatter builds chips for artificial intelligence computing. Our architecture leverages unique properties of light to enable fast and efficient inference and training engines. If you're a collaborative engineer or scientist who has a passion for innovation, solving challenging technical problems and doing impactful work...work like building the world's first optical computers, consider joining the team at Lightmatter!

Come help us build high performance ASICs for the next generation of AI acceleration systems.

In this role, you will be responsible for physical design in leading edge CMOS technology. This includes synthesis through place and route, timing closure, and tapeout signoff.

Responsibilities

• Provide initial power and area estimation for major chip functions
• Perform physical verification to ensure designs are DRC and LVS clean
• Perform power grid verification
• Implement the physical design flow from synthesis to tapeout
• Work with RTL designers to define floorplan, synthesize design, close timing and meet DFT goals
• Work with foundry to define design guidelines
• Scripting and automation of design flow

Requirements

• BS or higher degree in Electrical Engineering (or other related fields)
• At least 2 years of industry experience working on ASIC designs
• At least 1 complete tapeout
• Fluency in English, both written and verbal
• Experience with standard CAD tools
• Experience in Python, TCL or other scripting environments
• Experience in both ASIC and semi-custom COT flow
• Strong teamwork skills with the ability to collaborate with multiple functional teams across a variety of fields
• Ability to react to change and thrive in a fast paced environment

Preferred qualifications

• MS in Electrical Engineering (or related fields)
• 3-5 Years of industry experience working on ASIC designs with multiple production-quality ASIC tapeouts
• Experience interfacing with fab and packaging house
• Deep Understanding of all aspects of Physical construction, Integration, Power analysis and Physical Design Verification methodology to debug LVS/DRC issues at chip/block level
• Proven Knowledge of Basic SoC Architecture and HDL languages like System Verilog and chipware components to work hand in hand with RTL designers

Benefits

• Comprehensive Health Care Plan (Medical, Dental & Vision)
• 401k matching
• Life Insurance (Basic, Voluntary & AD&D)
• Generous Time Off (Vacation, Sick & Public Holidays)
• Paid Family Leave
• Short Term & Long Term Disability
• Training & Development
• Flexible, hybrid workplace model
• Stock Option Plan

Lightmatter recruits, employs, trains, compensates and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.